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Searched refs:DMA_SxCR_CHSEL_1 (Results 1 – 25 of 44) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma.h289 #define LL_DMA_CHANNEL_2 DMA_SxCR_CHSEL_1 …
290 #define LL_DMA_CHANNEL_3 (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1) …
293 #define LL_DMA_CHANNEL_6 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) …
294 #define LL_DMA_CHANNEL_7 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) …
298 #define LL_DMA_CHANNEL_10 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1) …
299 #define LL_DMA_CHANNEL_11 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) …
302 #define LL_DMA_CHANNEL_14 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) …
303 #define LL_DMA_CHANNEL_15 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 |…
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma.h292 #define LL_DMA_CHANNEL_2 DMA_SxCR_CHSEL_1 …
293 #define LL_DMA_CHANNEL_3 (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1) …
296 #define LL_DMA_CHANNEL_6 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) …
297 #define LL_DMA_CHANNEL_7 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) …
301 #define LL_DMA_CHANNEL_10 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1) …
302 #define LL_DMA_CHANNEL_11 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) …
305 #define LL_DMA_CHANNEL_14 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) …
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_dma.h289 #define LL_DMA_CHANNEL_2 DMA_SxCR_CHSEL_1 …
290 #define LL_DMA_CHANNEL_3 (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1) …
293 #define LL_DMA_CHANNEL_6 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) …
294 #define LL_DMA_CHANNEL_7 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) …
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1482 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f410rx.h1482 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f410tx.h1472 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f401xc.h1423 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f401xe.h1423 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f411xe.h1426 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f405xx.h5515 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f412cx.h5576 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f415xx.h5697 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f423xx.h5968 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f407xx.h5815 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f412zx.h5636 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f412rx.h5630 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f412vx.h5632 #define DMA_SxCR_CHSEL_1 0x04000000U macro
Dstm32f413xx.h5932 #define DMA_SxCR_CHSEL_1 0x04000000U macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5667 #define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ macro
Dstm32f205xx.h5517 #define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ macro
Dstm32f207xx.h5816 #define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ macro
Dstm32f217xx.h5966 #define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5486 #define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ macro
Dstm32f722xx.h5470 #define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ macro
Dstm32f730xx.h5700 #define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ macro

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