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Searched refs:DMA_LISR_TCIF0_Pos (Results 1 – 25 of 87) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1642 #define DMA_LISR_TCIF0_Pos (5U) macro
1643 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f410rx.h1642 #define DMA_LISR_TCIF0_Pos (5U) macro
1643 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f410tx.h1632 #define DMA_LISR_TCIF0_Pos (5U) macro
1633 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f401xc.h1583 #define DMA_LISR_TCIF0_Pos (5U) macro
1584 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f401xe.h1583 #define DMA_LISR_TCIF0_Pos (5U) macro
1584 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f411xe.h1586 #define DMA_LISR_TCIF0_Pos (5U) macro
1587 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f405xx.h5675 #define DMA_LISR_TCIF0_Pos (5U) macro
5676 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f412cx.h5736 #define DMA_LISR_TCIF0_Pos (5U) macro
5737 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f415xx.h5857 #define DMA_LISR_TCIF0_Pos (5U) macro
5858 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f423xx.h6129 #define DMA_LISR_TCIF0_Pos (5U) macro
6130 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f407xx.h5975 #define DMA_LISR_TCIF0_Pos (5U) macro
5976 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f412zx.h5796 #define DMA_LISR_TCIF0_Pos (5U) macro
5797 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f412rx.h5790 #define DMA_LISR_TCIF0_Pos (5U) macro
5791 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f412vx.h5792 #define DMA_LISR_TCIF0_Pos (5U) macro
5793 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f413xx.h6093 #define DMA_LISR_TCIF0_Pos (5U) macro
6094 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f427xx.h6066 #define DMA_LISR_TCIF0_Pos (5U) macro
6067 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5827 #define DMA_LISR_TCIF0_Pos (5U) macro
5828 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f205xx.h5677 #define DMA_LISR_TCIF0_Pos (5U) macro
5678 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f207xx.h5976 #define DMA_LISR_TCIF0_Pos (5U) macro
5977 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f217xx.h6126 #define DMA_LISR_TCIF0_Pos (5U) macro
6127 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5642 #define DMA_LISR_TCIF0_Pos (5U) macro
5643 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f722xx.h5626 #define DMA_LISR_TCIF0_Pos (5U) macro
5627 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f730xx.h5856 #define DMA_LISR_TCIF0_Pos (5U) macro
5857 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f733xx.h5856 #define DMA_LISR_TCIF0_Pos (5U) macro
5857 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
Dstm32f732xx.h5840 #define DMA_LISR_TCIF0_Pos (5U) macro
5841 #define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */

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