Home
last modified time | relevance | path

Searched refs:DMA_LIFCR_CTCIF3_Pos (Results 1 – 25 of 87) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1721 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
1722 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f410rx.h1721 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
1722 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f410tx.h1711 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
1712 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f401xc.h1662 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
1663 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f401xe.h1662 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
1663 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f411xe.h1665 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
1666 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f405xx.h5754 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5755 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f412cx.h5815 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5816 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f415xx.h5936 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5937 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f423xx.h6208 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
6209 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f407xx.h6054 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
6055 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f412zx.h5875 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5876 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f412rx.h5869 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5870 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f412vx.h5871 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5872 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f413xx.h6172 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
6173 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f427xx.h6145 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
6146 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5906 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5907 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f205xx.h5756 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5757 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f207xx.h6055 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
6056 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f217xx.h6205 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
6206 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5721 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5722 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f722xx.h5705 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5706 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f730xx.h5935 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5936 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f733xx.h5935 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5936 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
Dstm32f732xx.h5919 #define DMA_LIFCR_CTCIF3_Pos (27U) macro
5920 #define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */

1234