Searched refs:DMA_LIFCR_CTCIF0_Pos (Results 1 – 25 of 87) sorted by relevance
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1766 #define DMA_LIFCR_CTCIF0_Pos (5U) macro1767 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
1756 #define DMA_LIFCR_CTCIF0_Pos (5U) macro1757 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
1707 #define DMA_LIFCR_CTCIF0_Pos (5U) macro1708 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
1710 #define DMA_LIFCR_CTCIF0_Pos (5U) macro1711 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5799 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5800 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5860 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5861 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5981 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5982 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
6253 #define DMA_LIFCR_CTCIF0_Pos (5U) macro6254 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
6099 #define DMA_LIFCR_CTCIF0_Pos (5U) macro6100 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5920 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5921 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5914 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5915 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5916 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5917 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
6217 #define DMA_LIFCR_CTCIF0_Pos (5U) macro6218 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
6190 #define DMA_LIFCR_CTCIF0_Pos (5U) macro6191 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5951 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5952 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5801 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5802 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
6100 #define DMA_LIFCR_CTCIF0_Pos (5U) macro6101 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
6250 #define DMA_LIFCR_CTCIF0_Pos (5U) macro6251 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5766 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5767 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5750 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5751 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5980 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5981 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
5964 #define DMA_LIFCR_CTCIF0_Pos (5U) macro5965 #define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
