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Searched refs:DMA_LIFCR_CDMEIF0_Pos (Results 1 – 25 of 87) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1775 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
1776 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f410rx.h1775 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
1776 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f410tx.h1765 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
1766 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f401xc.h1716 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
1717 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f401xe.h1716 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
1717 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f411xe.h1719 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
1720 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f405xx.h5808 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5809 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f412cx.h5869 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5870 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f415xx.h5990 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5991 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f423xx.h6262 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
6263 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f407xx.h6108 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
6109 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f412zx.h5929 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5930 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f412rx.h5923 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5924 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f412vx.h5925 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5926 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f413xx.h6226 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
6227 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f427xx.h6199 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
6200 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5960 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5961 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f205xx.h5810 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5811 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f207xx.h6109 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
6110 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f217xx.h6259 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
6260 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5775 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5776 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f722xx.h5759 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5760 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f730xx.h5989 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5990 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f733xx.h5989 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5990 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
Dstm32f732xx.h5973 #define DMA_LIFCR_CDMEIF0_Pos (2U) macro
5974 #define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */

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