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Searched refs:DMA_ISR_TEIF5_Pos (Results 1 – 25 of 158) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h2888 #define DMA_ISR_TEIF5_Pos (19U) macro
2889 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f101xb.h2950 #define DMA_ISR_TEIF5_Pos (19U) macro
2951 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f100xb.h3102 #define DMA_ISR_TEIF5_Pos (19U) macro
3103 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f102x6.h2937 #define DMA_ISR_TEIF5_Pos (19U) macro
2938 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f100xe.h3449 #define DMA_ISR_TEIF5_Pos (19U) macro
3450 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f101xg.h3421 #define DMA_ISR_TEIF5_Pos (19U) macro
3422 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f101xe.h3345 #define DMA_ISR_TEIF5_Pos (19U) macro
3346 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h1017 #define DMA_ISR_TEIF5_Pos (19U) macro
1018 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f030x8.h1039 #define DMA_ISR_TEIF5_Pos (19U) macro
1040 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f070x6.h1062 #define DMA_ISR_TEIF5_Pos (19U) macro
1063 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f031x6.h1033 #define DMA_ISR_TEIF5_Pos (19U) macro
1034 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f030xc.h1058 #define DMA_ISR_TEIF5_Pos (19U) macro
1059 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f038xx.h1032 #define DMA_ISR_TEIF5_Pos (19U) macro
1033 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32f070xb.h1094 #define DMA_ISR_TEIF5_Pos (19U) macro
1095 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h1275 #define DMA_ISR_TEIF5_Pos (19U) macro
1276 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l010x8.h1038 #define DMA_ISR_TEIF5_Pos (19U) macro
1039 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l010xb.h1046 #define DMA_ISR_TEIF5_Pos (19U) macro
1047 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l011xx.h1135 #define DMA_ISR_TEIF5_Pos (19U) macro
1136 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l021xx.h1263 #define DMA_ISR_TEIF5_Pos (19U) macro
1264 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l031xx.h1147 #define DMA_ISR_TEIF5_Pos (19U) macro
1148 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l051xx.h1188 #define DMA_ISR_TEIF5_Pos (19U) macro
1189 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l010x4.h1030 #define DMA_ISR_TEIF5_Pos (19U) macro
1031 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l010x6.h1036 #define DMA_ISR_TEIF5_Pos (19U) macro
1037 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l081xx.h1347 #define DMA_ISR_TEIF5_Pos (19U) macro
1348 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */
Dstm32l071xx.h1219 #define DMA_ISR_TEIF5_Pos (19U) macro
1220 #define DMA_ISR_TEIF5_Msk (0x1UL << DMA_ISR_TEIF5_Pos) /*!< 0x00080000 */

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