Searched refs:DMA_ISR_TEIF2_Pos (Results 1 – 25 of 160) sorted by relevance
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2852 #define DMA_ISR_TEIF2_Pos (7U) macro2853 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
2914 #define DMA_ISR_TEIF2_Pos (7U) macro2915 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
3066 #define DMA_ISR_TEIF2_Pos (7U) macro3067 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
2901 #define DMA_ISR_TEIF2_Pos (7U) macro2902 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
3413 #define DMA_ISR_TEIF2_Pos (7U) macro3414 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
3385 #define DMA_ISR_TEIF2_Pos (7U) macro3386 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
3309 #define DMA_ISR_TEIF2_Pos (7U) macro3310 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
981 #define DMA_ISR_TEIF2_Pos (7U) macro982 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1003 #define DMA_ISR_TEIF2_Pos (7U) macro1004 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1026 #define DMA_ISR_TEIF2_Pos (7U) macro1027 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
997 #define DMA_ISR_TEIF2_Pos (7U) macro998 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1022 #define DMA_ISR_TEIF2_Pos (7U) macro1023 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
996 #define DMA_ISR_TEIF2_Pos (7U) macro997 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1058 #define DMA_ISR_TEIF2_Pos (7U) macro1059 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1239 #define DMA_ISR_TEIF2_Pos (7U) macro1240 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1002 #define DMA_ISR_TEIF2_Pos (7U) macro1003 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1010 #define DMA_ISR_TEIF2_Pos (7U) macro1011 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1099 #define DMA_ISR_TEIF2_Pos (7U) macro1100 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1227 #define DMA_ISR_TEIF2_Pos (7U) macro1228 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1111 #define DMA_ISR_TEIF2_Pos (7U) macro1112 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1152 #define DMA_ISR_TEIF2_Pos (7U) macro1153 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
994 #define DMA_ISR_TEIF2_Pos (7U) macro995 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1000 #define DMA_ISR_TEIF2_Pos (7U) macro1001 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1311 #define DMA_ISR_TEIF2_Pos (7U) macro1312 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
1183 #define DMA_ISR_TEIF2_Pos (7U) macro1184 #define DMA_ISR_TEIF2_Msk (0x1UL << DMA_ISR_TEIF2_Pos) /*!< 0x00000080 */
