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Searched refs:DMA_ISR_TEIF1_Pos (Results 1 – 25 of 160) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h2840 #define DMA_ISR_TEIF1_Pos (3U) macro
2841 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f101xb.h2902 #define DMA_ISR_TEIF1_Pos (3U) macro
2903 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f100xb.h3054 #define DMA_ISR_TEIF1_Pos (3U) macro
3055 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f102x6.h2889 #define DMA_ISR_TEIF1_Pos (3U) macro
2890 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f100xe.h3401 #define DMA_ISR_TEIF1_Pos (3U) macro
3402 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f101xg.h3373 #define DMA_ISR_TEIF1_Pos (3U) macro
3374 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f101xe.h3297 #define DMA_ISR_TEIF1_Pos (3U) macro
3298 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h969 #define DMA_ISR_TEIF1_Pos (3U) macro
970 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f030x8.h991 #define DMA_ISR_TEIF1_Pos (3U) macro
992 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f070x6.h1014 #define DMA_ISR_TEIF1_Pos (3U) macro
1015 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f031x6.h985 #define DMA_ISR_TEIF1_Pos (3U) macro
986 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f030xc.h1010 #define DMA_ISR_TEIF1_Pos (3U) macro
1011 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f038xx.h984 #define DMA_ISR_TEIF1_Pos (3U) macro
985 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32f070xb.h1046 #define DMA_ISR_TEIF1_Pos (3U) macro
1047 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h1227 #define DMA_ISR_TEIF1_Pos (3U) macro
1228 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l010x8.h990 #define DMA_ISR_TEIF1_Pos (3U) macro
991 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l010xb.h998 #define DMA_ISR_TEIF1_Pos (3U) macro
999 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l011xx.h1087 #define DMA_ISR_TEIF1_Pos (3U) macro
1088 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l021xx.h1215 #define DMA_ISR_TEIF1_Pos (3U) macro
1216 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l031xx.h1099 #define DMA_ISR_TEIF1_Pos (3U) macro
1100 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l051xx.h1140 #define DMA_ISR_TEIF1_Pos (3U) macro
1141 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l010x4.h982 #define DMA_ISR_TEIF1_Pos (3U) macro
983 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l010x6.h988 #define DMA_ISR_TEIF1_Pos (3U) macro
989 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l081xx.h1299 #define DMA_ISR_TEIF1_Pos (3U) macro
1300 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
Dstm32l071xx.h1171 #define DMA_ISR_TEIF1_Pos (3U) macro
1172 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */

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