Searched refs:DMA_ISR_TCIF5_Pos (Results 1 – 25 of 158) sorted by relevance
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2882 #define DMA_ISR_TCIF5_Pos (17U) macro2883 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
2944 #define DMA_ISR_TCIF5_Pos (17U) macro2945 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
3096 #define DMA_ISR_TCIF5_Pos (17U) macro3097 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
2931 #define DMA_ISR_TCIF5_Pos (17U) macro2932 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
3443 #define DMA_ISR_TCIF5_Pos (17U) macro3444 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
3415 #define DMA_ISR_TCIF5_Pos (17U) macro3416 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
3339 #define DMA_ISR_TCIF5_Pos (17U) macro3340 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1011 #define DMA_ISR_TCIF5_Pos (17U) macro1012 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1033 #define DMA_ISR_TCIF5_Pos (17U) macro1034 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1056 #define DMA_ISR_TCIF5_Pos (17U) macro1057 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1027 #define DMA_ISR_TCIF5_Pos (17U) macro1028 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1052 #define DMA_ISR_TCIF5_Pos (17U) macro1053 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1026 #define DMA_ISR_TCIF5_Pos (17U) macro1027 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1088 #define DMA_ISR_TCIF5_Pos (17U) macro1089 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1269 #define DMA_ISR_TCIF5_Pos (17U) macro1270 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1032 #define DMA_ISR_TCIF5_Pos (17U) macro1033 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1040 #define DMA_ISR_TCIF5_Pos (17U) macro1041 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1129 #define DMA_ISR_TCIF5_Pos (17U) macro1130 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1257 #define DMA_ISR_TCIF5_Pos (17U) macro1258 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1141 #define DMA_ISR_TCIF5_Pos (17U) macro1142 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1182 #define DMA_ISR_TCIF5_Pos (17U) macro1183 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1024 #define DMA_ISR_TCIF5_Pos (17U) macro1025 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1030 #define DMA_ISR_TCIF5_Pos (17U) macro1031 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1341 #define DMA_ISR_TCIF5_Pos (17U) macro1342 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
1213 #define DMA_ISR_TCIF5_Pos (17U) macro1214 #define DMA_ISR_TCIF5_Msk (0x1UL << DMA_ISR_TCIF5_Pos) /*!< 0x00020000 */
