Searched refs:DMA_ISR_TCIF2_Pos (Results 1 – 25 of 160) sorted by relevance
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2846 #define DMA_ISR_TCIF2_Pos (5U) macro2847 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
2908 #define DMA_ISR_TCIF2_Pos (5U) macro2909 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
3060 #define DMA_ISR_TCIF2_Pos (5U) macro3061 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
2895 #define DMA_ISR_TCIF2_Pos (5U) macro2896 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
3407 #define DMA_ISR_TCIF2_Pos (5U) macro3408 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
3379 #define DMA_ISR_TCIF2_Pos (5U) macro3380 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
3303 #define DMA_ISR_TCIF2_Pos (5U) macro3304 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
975 #define DMA_ISR_TCIF2_Pos (5U) macro976 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
997 #define DMA_ISR_TCIF2_Pos (5U) macro998 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1020 #define DMA_ISR_TCIF2_Pos (5U) macro1021 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
991 #define DMA_ISR_TCIF2_Pos (5U) macro992 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1016 #define DMA_ISR_TCIF2_Pos (5U) macro1017 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
990 #define DMA_ISR_TCIF2_Pos (5U) macro991 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1052 #define DMA_ISR_TCIF2_Pos (5U) macro1053 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1233 #define DMA_ISR_TCIF2_Pos (5U) macro1234 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
996 #define DMA_ISR_TCIF2_Pos (5U) macro997 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1004 #define DMA_ISR_TCIF2_Pos (5U) macro1005 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1093 #define DMA_ISR_TCIF2_Pos (5U) macro1094 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1221 #define DMA_ISR_TCIF2_Pos (5U) macro1222 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1105 #define DMA_ISR_TCIF2_Pos (5U) macro1106 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1146 #define DMA_ISR_TCIF2_Pos (5U) macro1147 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
988 #define DMA_ISR_TCIF2_Pos (5U) macro989 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
994 #define DMA_ISR_TCIF2_Pos (5U) macro995 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1305 #define DMA_ISR_TCIF2_Pos (5U) macro1306 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
1177 #define DMA_ISR_TCIF2_Pos (5U) macro1178 #define DMA_ISR_TCIF2_Msk (0x1UL << DMA_ISR_TCIF2_Pos) /*!< 0x00000020 */
