Searched refs:DMA_ISR_TCIF1_Pos (Results 1 – 25 of 160) sorted by relevance
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2834 #define DMA_ISR_TCIF1_Pos (1U) macro2835 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
2896 #define DMA_ISR_TCIF1_Pos (1U) macro2897 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
3048 #define DMA_ISR_TCIF1_Pos (1U) macro3049 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
2883 #define DMA_ISR_TCIF1_Pos (1U) macro2884 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
3395 #define DMA_ISR_TCIF1_Pos (1U) macro3396 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
3367 #define DMA_ISR_TCIF1_Pos (1U) macro3368 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
3291 #define DMA_ISR_TCIF1_Pos (1U) macro3292 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
963 #define DMA_ISR_TCIF1_Pos (1U) macro964 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
985 #define DMA_ISR_TCIF1_Pos (1U) macro986 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1008 #define DMA_ISR_TCIF1_Pos (1U) macro1009 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
979 #define DMA_ISR_TCIF1_Pos (1U) macro980 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1004 #define DMA_ISR_TCIF1_Pos (1U) macro1005 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
978 #define DMA_ISR_TCIF1_Pos (1U) macro979 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1040 #define DMA_ISR_TCIF1_Pos (1U) macro1041 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1221 #define DMA_ISR_TCIF1_Pos (1U) macro1222 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
984 #define DMA_ISR_TCIF1_Pos (1U) macro985 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
992 #define DMA_ISR_TCIF1_Pos (1U) macro993 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1081 #define DMA_ISR_TCIF1_Pos (1U) macro1082 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1209 #define DMA_ISR_TCIF1_Pos (1U) macro1210 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1093 #define DMA_ISR_TCIF1_Pos (1U) macro1094 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1134 #define DMA_ISR_TCIF1_Pos (1U) macro1135 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
976 #define DMA_ISR_TCIF1_Pos (1U) macro977 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
982 #define DMA_ISR_TCIF1_Pos (1U) macro983 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1293 #define DMA_ISR_TCIF1_Pos (1U) macro1294 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
1165 #define DMA_ISR_TCIF1_Pos (1U) macro1166 #define DMA_ISR_TCIF1_Msk (0x1UL << DMA_ISR_TCIF1_Pos) /*!< 0x00000002 */
