Searched refs:DMA_IFCR_CTEIF4_Pos (Results 1 – 25 of 158) sorted by relevance
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2962 #define DMA_IFCR_CTEIF4_Pos (15U) macro2963 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
3024 #define DMA_IFCR_CTEIF4_Pos (15U) macro3025 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
3176 #define DMA_IFCR_CTEIF4_Pos (15U) macro3177 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
3011 #define DMA_IFCR_CTEIF4_Pos (15U) macro3012 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
3523 #define DMA_IFCR_CTEIF4_Pos (15U) macro3524 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
3495 #define DMA_IFCR_CTEIF4_Pos (15U) macro3496 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
3419 #define DMA_IFCR_CTEIF4_Pos (15U) macro3420 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1067 #define DMA_IFCR_CTEIF4_Pos (15U) macro1068 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1089 #define DMA_IFCR_CTEIF4_Pos (15U) macro1090 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1112 #define DMA_IFCR_CTEIF4_Pos (15U) macro1113 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1083 #define DMA_IFCR_CTEIF4_Pos (15U) macro1084 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1108 #define DMA_IFCR_CTEIF4_Pos (15U) macro1109 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1082 #define DMA_IFCR_CTEIF4_Pos (15U) macro1083 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1144 #define DMA_IFCR_CTEIF4_Pos (15U) macro1145 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1349 #define DMA_IFCR_CTEIF4_Pos (15U) macro1350 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1120 #define DMA_IFCR_CTEIF4_Pos (15U) macro1121 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1185 #define DMA_IFCR_CTEIF4_Pos (15U) macro1186 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1313 #define DMA_IFCR_CTEIF4_Pos (15U) macro1314 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1221 #define DMA_IFCR_CTEIF4_Pos (15U) macro1222 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1262 #define DMA_IFCR_CTEIF4_Pos (15U) macro1263 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1104 #define DMA_IFCR_CTEIF4_Pos (15U) macro1105 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1110 #define DMA_IFCR_CTEIF4_Pos (15U) macro1111 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1421 #define DMA_IFCR_CTEIF4_Pos (15U) macro1422 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
1293 #define DMA_IFCR_CTEIF4_Pos (15U) macro1294 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
