Searched refs:DMA_IFCR_CTEIF3_Pos (Results 1 – 25 of 160) sorted by relevance
1234567
2950 #define DMA_IFCR_CTEIF3_Pos (11U) macro2951 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
3012 #define DMA_IFCR_CTEIF3_Pos (11U) macro3013 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
3164 #define DMA_IFCR_CTEIF3_Pos (11U) macro3165 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
2999 #define DMA_IFCR_CTEIF3_Pos (11U) macro3000 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
3511 #define DMA_IFCR_CTEIF3_Pos (11U) macro3512 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
3483 #define DMA_IFCR_CTEIF3_Pos (11U) macro3484 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
3407 #define DMA_IFCR_CTEIF3_Pos (11U) macro3408 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1055 #define DMA_IFCR_CTEIF3_Pos (11U) macro1056 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1077 #define DMA_IFCR_CTEIF3_Pos (11U) macro1078 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1100 #define DMA_IFCR_CTEIF3_Pos (11U) macro1101 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1071 #define DMA_IFCR_CTEIF3_Pos (11U) macro1072 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1096 #define DMA_IFCR_CTEIF3_Pos (11U) macro1097 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1070 #define DMA_IFCR_CTEIF3_Pos (11U) macro1071 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1132 #define DMA_IFCR_CTEIF3_Pos (11U) macro1133 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1337 #define DMA_IFCR_CTEIF3_Pos (11U) macro1338 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1108 #define DMA_IFCR_CTEIF3_Pos (11U) macro1109 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1173 #define DMA_IFCR_CTEIF3_Pos (11U) macro1174 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1301 #define DMA_IFCR_CTEIF3_Pos (11U) macro1302 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1209 #define DMA_IFCR_CTEIF3_Pos (11U) macro1210 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1250 #define DMA_IFCR_CTEIF3_Pos (11U) macro1251 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1092 #define DMA_IFCR_CTEIF3_Pos (11U) macro1093 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1098 #define DMA_IFCR_CTEIF3_Pos (11U) macro1099 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1409 #define DMA_IFCR_CTEIF3_Pos (11U) macro1410 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */
1281 #define DMA_IFCR_CTEIF3_Pos (11U) macro1282 #define DMA_IFCR_CTEIF3_Msk (0x1UL << DMA_IFCR_CTEIF3_Pos) /*!< 0x00000800 */