Searched refs:DMA_IFCR_CTCIF5_Pos (Results 1 – 25 of 158) sorted by relevance
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2968 #define DMA_IFCR_CTCIF5_Pos (17U) macro2969 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
3030 #define DMA_IFCR_CTCIF5_Pos (17U) macro3031 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
3182 #define DMA_IFCR_CTCIF5_Pos (17U) macro3183 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
3017 #define DMA_IFCR_CTCIF5_Pos (17U) macro3018 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
3529 #define DMA_IFCR_CTCIF5_Pos (17U) macro3530 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
3501 #define DMA_IFCR_CTCIF5_Pos (17U) macro3502 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
3425 #define DMA_IFCR_CTCIF5_Pos (17U) macro3426 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1073 #define DMA_IFCR_CTCIF5_Pos (17U) macro1074 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1095 #define DMA_IFCR_CTCIF5_Pos (17U) macro1096 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1118 #define DMA_IFCR_CTCIF5_Pos (17U) macro1119 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1089 #define DMA_IFCR_CTCIF5_Pos (17U) macro1090 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1114 #define DMA_IFCR_CTCIF5_Pos (17U) macro1115 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1088 #define DMA_IFCR_CTCIF5_Pos (17U) macro1089 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1150 #define DMA_IFCR_CTCIF5_Pos (17U) macro1151 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1355 #define DMA_IFCR_CTCIF5_Pos (17U) macro1356 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1126 #define DMA_IFCR_CTCIF5_Pos (17U) macro1127 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1191 #define DMA_IFCR_CTCIF5_Pos (17U) macro1192 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1319 #define DMA_IFCR_CTCIF5_Pos (17U) macro1320 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1227 #define DMA_IFCR_CTCIF5_Pos (17U) macro1228 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1268 #define DMA_IFCR_CTCIF5_Pos (17U) macro1269 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1110 #define DMA_IFCR_CTCIF5_Pos (17U) macro1111 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1116 #define DMA_IFCR_CTCIF5_Pos (17U) macro1117 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1427 #define DMA_IFCR_CTCIF5_Pos (17U) macro1428 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
1299 #define DMA_IFCR_CTCIF5_Pos (17U) macro1300 #define DMA_IFCR_CTCIF5_Msk (0x1UL << DMA_IFCR_CTCIF5_Pos) /*!< 0x00020000 */
