Searched refs:DMA_IFCR_CGIF5_Pos (Results 1 – 25 of 158) sorted by relevance
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2965 #define DMA_IFCR_CGIF5_Pos (16U) macro2966 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
3027 #define DMA_IFCR_CGIF5_Pos (16U) macro3028 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
3179 #define DMA_IFCR_CGIF5_Pos (16U) macro3180 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
3014 #define DMA_IFCR_CGIF5_Pos (16U) macro3015 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
3526 #define DMA_IFCR_CGIF5_Pos (16U) macro3527 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
3498 #define DMA_IFCR_CGIF5_Pos (16U) macro3499 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
3422 #define DMA_IFCR_CGIF5_Pos (16U) macro3423 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1070 #define DMA_IFCR_CGIF5_Pos (16U) macro1071 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1092 #define DMA_IFCR_CGIF5_Pos (16U) macro1093 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1115 #define DMA_IFCR_CGIF5_Pos (16U) macro1116 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1086 #define DMA_IFCR_CGIF5_Pos (16U) macro1087 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1111 #define DMA_IFCR_CGIF5_Pos (16U) macro1112 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1085 #define DMA_IFCR_CGIF5_Pos (16U) macro1086 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1147 #define DMA_IFCR_CGIF5_Pos (16U) macro1148 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1352 #define DMA_IFCR_CGIF5_Pos (16U) macro1353 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1123 #define DMA_IFCR_CGIF5_Pos (16U) macro1124 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1188 #define DMA_IFCR_CGIF5_Pos (16U) macro1189 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1316 #define DMA_IFCR_CGIF5_Pos (16U) macro1317 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1224 #define DMA_IFCR_CGIF5_Pos (16U) macro1225 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1265 #define DMA_IFCR_CGIF5_Pos (16U) macro1266 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1107 #define DMA_IFCR_CGIF5_Pos (16U) macro1108 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1113 #define DMA_IFCR_CGIF5_Pos (16U) macro1114 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1424 #define DMA_IFCR_CGIF5_Pos (16U) macro1425 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
1296 #define DMA_IFCR_CGIF5_Pos (16U) macro1297 #define DMA_IFCR_CGIF5_Msk (0x1UL << DMA_IFCR_CGIF5_Pos) /*!< 0x00010000 */
