Searched refs:DMA_HISR_TEIF7_Pos (Results 1 – 25 of 87) sorted by relevance
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1665 #define DMA_HISR_TEIF7_Pos (25U) macro1666 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
1655 #define DMA_HISR_TEIF7_Pos (25U) macro1656 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
1606 #define DMA_HISR_TEIF7_Pos (25U) macro1607 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
1609 #define DMA_HISR_TEIF7_Pos (25U) macro1610 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5698 #define DMA_HISR_TEIF7_Pos (25U) macro5699 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5759 #define DMA_HISR_TEIF7_Pos (25U) macro5760 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5880 #define DMA_HISR_TEIF7_Pos (25U) macro5881 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
6152 #define DMA_HISR_TEIF7_Pos (25U) macro6153 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5998 #define DMA_HISR_TEIF7_Pos (25U) macro5999 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5819 #define DMA_HISR_TEIF7_Pos (25U) macro5820 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5813 #define DMA_HISR_TEIF7_Pos (25U) macro5814 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5815 #define DMA_HISR_TEIF7_Pos (25U) macro5816 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
6116 #define DMA_HISR_TEIF7_Pos (25U) macro6117 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
6089 #define DMA_HISR_TEIF7_Pos (25U) macro6090 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5850 #define DMA_HISR_TEIF7_Pos (25U) macro5851 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5700 #define DMA_HISR_TEIF7_Pos (25U) macro5701 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5999 #define DMA_HISR_TEIF7_Pos (25U) macro6000 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
6149 #define DMA_HISR_TEIF7_Pos (25U) macro6150 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5665 #define DMA_HISR_TEIF7_Pos (25U) macro5666 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5649 #define DMA_HISR_TEIF7_Pos (25U) macro5650 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5879 #define DMA_HISR_TEIF7_Pos (25U) macro5880 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
5863 #define DMA_HISR_TEIF7_Pos (25U) macro5864 #define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
