Home
last modified time | relevance | path

Searched refs:DMA_HISR_TEIF5 (Results 1 – 25 of 92) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_dma.h1872 return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF5)==(DMA_HISR_TEIF5)); in LL_DMA_IsActiveFlag_TE5()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma.h1905 return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF5)==(DMA_HISR_TEIF5)); in LL_DMA_IsActiveFlag_TE5()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma.h1882 return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF5)==(DMA_HISR_TEIF5)); in LL_DMA_IsActiveFlag_TE5()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_dma.h2163 return ((READ_BIT(DMAx->HISR, DMA_HISR_TEIF5) == (DMA_HISR_TEIF5)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE5()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma.h2306 return ((READ_BIT(DMAx->HISR, DMA_HISR_TEIF5) == (DMA_HISR_TEIF5)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE5()
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1697 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f410rx.h1697 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f410tx.h1687 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f401xc.h1638 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f401xe.h1638 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f411xe.h1641 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f405xx.h5730 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f412cx.h5791 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f415xx.h5912 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f423xx.h6184 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f407xx.h6030 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f412zx.h5851 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f412rx.h5845 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f412vx.h5847 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f413xx.h6148 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5882 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f205xx.h5732 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f207xx.h6031 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5697 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro
Dstm32f722xx.h5681 #define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk macro

1234