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Searched refs:DMA_HISR_TCIF7_Pos (Results 1 – 25 of 87) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1659 #define DMA_HISR_TCIF7_Pos (27U) macro
1660 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f410rx.h1659 #define DMA_HISR_TCIF7_Pos (27U) macro
1660 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f410tx.h1649 #define DMA_HISR_TCIF7_Pos (27U) macro
1650 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f401xc.h1600 #define DMA_HISR_TCIF7_Pos (27U) macro
1601 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f401xe.h1600 #define DMA_HISR_TCIF7_Pos (27U) macro
1601 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f411xe.h1603 #define DMA_HISR_TCIF7_Pos (27U) macro
1604 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f405xx.h5692 #define DMA_HISR_TCIF7_Pos (27U) macro
5693 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f412cx.h5753 #define DMA_HISR_TCIF7_Pos (27U) macro
5754 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f415xx.h5874 #define DMA_HISR_TCIF7_Pos (27U) macro
5875 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f423xx.h6146 #define DMA_HISR_TCIF7_Pos (27U) macro
6147 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f407xx.h5992 #define DMA_HISR_TCIF7_Pos (27U) macro
5993 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f412zx.h5813 #define DMA_HISR_TCIF7_Pos (27U) macro
5814 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f412rx.h5807 #define DMA_HISR_TCIF7_Pos (27U) macro
5808 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f412vx.h5809 #define DMA_HISR_TCIF7_Pos (27U) macro
5810 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f413xx.h6110 #define DMA_HISR_TCIF7_Pos (27U) macro
6111 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f427xx.h6083 #define DMA_HISR_TCIF7_Pos (27U) macro
6084 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5844 #define DMA_HISR_TCIF7_Pos (27U) macro
5845 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f205xx.h5694 #define DMA_HISR_TCIF7_Pos (27U) macro
5695 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f207xx.h5993 #define DMA_HISR_TCIF7_Pos (27U) macro
5994 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f217xx.h6143 #define DMA_HISR_TCIF7_Pos (27U) macro
6144 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5659 #define DMA_HISR_TCIF7_Pos (27U) macro
5660 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f722xx.h5643 #define DMA_HISR_TCIF7_Pos (27U) macro
5644 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f730xx.h5873 #define DMA_HISR_TCIF7_Pos (27U) macro
5874 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f733xx.h5873 #define DMA_HISR_TCIF7_Pos (27U) macro
5874 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
Dstm32f732xx.h5857 #define DMA_HISR_TCIF7_Pos (27U) macro
5858 #define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */

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