Searched refs:DMA_HISR_TCIF6_Pos (Results 1 – 25 of 87) sorted by relevance
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1674 #define DMA_HISR_TCIF6_Pos (21U) macro1675 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
1664 #define DMA_HISR_TCIF6_Pos (21U) macro1665 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
1615 #define DMA_HISR_TCIF6_Pos (21U) macro1616 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
1618 #define DMA_HISR_TCIF6_Pos (21U) macro1619 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5707 #define DMA_HISR_TCIF6_Pos (21U) macro5708 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5768 #define DMA_HISR_TCIF6_Pos (21U) macro5769 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5889 #define DMA_HISR_TCIF6_Pos (21U) macro5890 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
6161 #define DMA_HISR_TCIF6_Pos (21U) macro6162 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
6007 #define DMA_HISR_TCIF6_Pos (21U) macro6008 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5828 #define DMA_HISR_TCIF6_Pos (21U) macro5829 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5822 #define DMA_HISR_TCIF6_Pos (21U) macro5823 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5824 #define DMA_HISR_TCIF6_Pos (21U) macro5825 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
6125 #define DMA_HISR_TCIF6_Pos (21U) macro6126 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
6098 #define DMA_HISR_TCIF6_Pos (21U) macro6099 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5859 #define DMA_HISR_TCIF6_Pos (21U) macro5860 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5709 #define DMA_HISR_TCIF6_Pos (21U) macro5710 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
6008 #define DMA_HISR_TCIF6_Pos (21U) macro6009 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
6158 #define DMA_HISR_TCIF6_Pos (21U) macro6159 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5674 #define DMA_HISR_TCIF6_Pos (21U) macro5675 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5658 #define DMA_HISR_TCIF6_Pos (21U) macro5659 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5888 #define DMA_HISR_TCIF6_Pos (21U) macro5889 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
5872 #define DMA_HISR_TCIF6_Pos (21U) macro5873 #define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
