Searched refs:DMA_HISR_TCIF4_Pos (Results 1 – 25 of 87) sorted by relevance
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1704 #define DMA_HISR_TCIF4_Pos (5U) macro1705 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
1694 #define DMA_HISR_TCIF4_Pos (5U) macro1695 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
1645 #define DMA_HISR_TCIF4_Pos (5U) macro1646 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
1648 #define DMA_HISR_TCIF4_Pos (5U) macro1649 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5737 #define DMA_HISR_TCIF4_Pos (5U) macro5738 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5798 #define DMA_HISR_TCIF4_Pos (5U) macro5799 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5919 #define DMA_HISR_TCIF4_Pos (5U) macro5920 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
6191 #define DMA_HISR_TCIF4_Pos (5U) macro6192 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
6037 #define DMA_HISR_TCIF4_Pos (5U) macro6038 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5858 #define DMA_HISR_TCIF4_Pos (5U) macro5859 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5852 #define DMA_HISR_TCIF4_Pos (5U) macro5853 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5854 #define DMA_HISR_TCIF4_Pos (5U) macro5855 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
6155 #define DMA_HISR_TCIF4_Pos (5U) macro6156 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
6128 #define DMA_HISR_TCIF4_Pos (5U) macro6129 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5889 #define DMA_HISR_TCIF4_Pos (5U) macro5890 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5739 #define DMA_HISR_TCIF4_Pos (5U) macro5740 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
6038 #define DMA_HISR_TCIF4_Pos (5U) macro6039 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
6188 #define DMA_HISR_TCIF4_Pos (5U) macro6189 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5704 #define DMA_HISR_TCIF4_Pos (5U) macro5705 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5688 #define DMA_HISR_TCIF4_Pos (5U) macro5689 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5918 #define DMA_HISR_TCIF4_Pos (5U) macro5919 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
5902 #define DMA_HISR_TCIF4_Pos (5U) macro5903 #define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
