Home
last modified time | relevance | path

Searched refs:DMA_HISR_HTIF4_Pos (Results 1 – 25 of 87) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1707 #define DMA_HISR_HTIF4_Pos (4U) macro
1708 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f410rx.h1707 #define DMA_HISR_HTIF4_Pos (4U) macro
1708 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f410tx.h1697 #define DMA_HISR_HTIF4_Pos (4U) macro
1698 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f401xc.h1648 #define DMA_HISR_HTIF4_Pos (4U) macro
1649 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f401xe.h1648 #define DMA_HISR_HTIF4_Pos (4U) macro
1649 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f411xe.h1651 #define DMA_HISR_HTIF4_Pos (4U) macro
1652 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f405xx.h5740 #define DMA_HISR_HTIF4_Pos (4U) macro
5741 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f412cx.h5801 #define DMA_HISR_HTIF4_Pos (4U) macro
5802 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f415xx.h5922 #define DMA_HISR_HTIF4_Pos (4U) macro
5923 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f423xx.h6194 #define DMA_HISR_HTIF4_Pos (4U) macro
6195 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f407xx.h6040 #define DMA_HISR_HTIF4_Pos (4U) macro
6041 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f412zx.h5861 #define DMA_HISR_HTIF4_Pos (4U) macro
5862 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f412rx.h5855 #define DMA_HISR_HTIF4_Pos (4U) macro
5856 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f412vx.h5857 #define DMA_HISR_HTIF4_Pos (4U) macro
5858 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f413xx.h6158 #define DMA_HISR_HTIF4_Pos (4U) macro
6159 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f427xx.h6131 #define DMA_HISR_HTIF4_Pos (4U) macro
6132 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5892 #define DMA_HISR_HTIF4_Pos (4U) macro
5893 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f205xx.h5742 #define DMA_HISR_HTIF4_Pos (4U) macro
5743 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f207xx.h6041 #define DMA_HISR_HTIF4_Pos (4U) macro
6042 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f217xx.h6191 #define DMA_HISR_HTIF4_Pos (4U) macro
6192 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5707 #define DMA_HISR_HTIF4_Pos (4U) macro
5708 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f722xx.h5691 #define DMA_HISR_HTIF4_Pos (4U) macro
5692 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f730xx.h5921 #define DMA_HISR_HTIF4_Pos (4U) macro
5922 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f733xx.h5921 #define DMA_HISR_HTIF4_Pos (4U) macro
5922 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
Dstm32f732xx.h5905 #define DMA_HISR_HTIF4_Pos (4U) macro
5906 #define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */

1234