Searched refs:DMA_HISR_FEIF6_Pos (Results 1 – 25 of 87) sorted by relevance
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1686 #define DMA_HISR_FEIF6_Pos (16U) macro1687 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
1676 #define DMA_HISR_FEIF6_Pos (16U) macro1677 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
1627 #define DMA_HISR_FEIF6_Pos (16U) macro1628 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
1630 #define DMA_HISR_FEIF6_Pos (16U) macro1631 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5719 #define DMA_HISR_FEIF6_Pos (16U) macro5720 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5780 #define DMA_HISR_FEIF6_Pos (16U) macro5781 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5901 #define DMA_HISR_FEIF6_Pos (16U) macro5902 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
6173 #define DMA_HISR_FEIF6_Pos (16U) macro6174 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
6019 #define DMA_HISR_FEIF6_Pos (16U) macro6020 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5840 #define DMA_HISR_FEIF6_Pos (16U) macro5841 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5834 #define DMA_HISR_FEIF6_Pos (16U) macro5835 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5836 #define DMA_HISR_FEIF6_Pos (16U) macro5837 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
6137 #define DMA_HISR_FEIF6_Pos (16U) macro6138 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
6110 #define DMA_HISR_FEIF6_Pos (16U) macro6111 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5871 #define DMA_HISR_FEIF6_Pos (16U) macro5872 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5721 #define DMA_HISR_FEIF6_Pos (16U) macro5722 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
6020 #define DMA_HISR_FEIF6_Pos (16U) macro6021 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
6170 #define DMA_HISR_FEIF6_Pos (16U) macro6171 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5686 #define DMA_HISR_FEIF6_Pos (16U) macro5687 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5670 #define DMA_HISR_FEIF6_Pos (16U) macro5671 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5900 #define DMA_HISR_FEIF6_Pos (16U) macro5901 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
5884 #define DMA_HISR_FEIF6_Pos (16U) macro5885 #define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
