Searched refs:DMA_HISR_DMEIF4_Pos (Results 1 – 25 of 87) sorted by relevance
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1713 #define DMA_HISR_DMEIF4_Pos (2U) macro1714 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
1703 #define DMA_HISR_DMEIF4_Pos (2U) macro1704 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
1654 #define DMA_HISR_DMEIF4_Pos (2U) macro1655 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
1657 #define DMA_HISR_DMEIF4_Pos (2U) macro1658 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5746 #define DMA_HISR_DMEIF4_Pos (2U) macro5747 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5807 #define DMA_HISR_DMEIF4_Pos (2U) macro5808 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5928 #define DMA_HISR_DMEIF4_Pos (2U) macro5929 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
6200 #define DMA_HISR_DMEIF4_Pos (2U) macro6201 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
6046 #define DMA_HISR_DMEIF4_Pos (2U) macro6047 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5867 #define DMA_HISR_DMEIF4_Pos (2U) macro5868 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5861 #define DMA_HISR_DMEIF4_Pos (2U) macro5862 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5863 #define DMA_HISR_DMEIF4_Pos (2U) macro5864 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
6164 #define DMA_HISR_DMEIF4_Pos (2U) macro6165 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
6137 #define DMA_HISR_DMEIF4_Pos (2U) macro6138 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5898 #define DMA_HISR_DMEIF4_Pos (2U) macro5899 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5748 #define DMA_HISR_DMEIF4_Pos (2U) macro5749 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
6047 #define DMA_HISR_DMEIF4_Pos (2U) macro6048 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
6197 #define DMA_HISR_DMEIF4_Pos (2U) macro6198 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5713 #define DMA_HISR_DMEIF4_Pos (2U) macro5714 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5697 #define DMA_HISR_DMEIF4_Pos (2U) macro5698 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5927 #define DMA_HISR_DMEIF4_Pos (2U) macro5928 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
5911 #define DMA_HISR_DMEIF4_Pos (2U) macro5912 #define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
