Searched refs:DMA_HIFCR_CTEIF5_Pos (Results 1 – 25 of 87) sorted by relevance
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1819 #define DMA_HIFCR_CTEIF5_Pos (9U) macro1820 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
1809 #define DMA_HIFCR_CTEIF5_Pos (9U) macro1810 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
1760 #define DMA_HIFCR_CTEIF5_Pos (9U) macro1761 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
1763 #define DMA_HIFCR_CTEIF5_Pos (9U) macro1764 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
5852 #define DMA_HIFCR_CTEIF5_Pos (9U) macro5853 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
5913 #define DMA_HIFCR_CTEIF5_Pos (9U) macro5914 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6034 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6035 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6306 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6307 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6152 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6153 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
5973 #define DMA_HIFCR_CTEIF5_Pos (9U) macro5974 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
5967 #define DMA_HIFCR_CTEIF5_Pos (9U) macro5968 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
5969 #define DMA_HIFCR_CTEIF5_Pos (9U) macro5970 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6270 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6271 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6243 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6244 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6004 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6005 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
5854 #define DMA_HIFCR_CTEIF5_Pos (9U) macro5855 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6153 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6154 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6303 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6304 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
5819 #define DMA_HIFCR_CTEIF5_Pos (9U) macro5820 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
5803 #define DMA_HIFCR_CTEIF5_Pos (9U) macro5804 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6033 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6034 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
6017 #define DMA_HIFCR_CTEIF5_Pos (9U) macro6018 #define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
