Searched refs:DMA_HIFCR_CTCIF4_Pos (Results 1 – 25 of 87) sorted by relevance
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1828 #define DMA_HIFCR_CTCIF4_Pos (5U) macro1829 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
1818 #define DMA_HIFCR_CTCIF4_Pos (5U) macro1819 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
1769 #define DMA_HIFCR_CTCIF4_Pos (5U) macro1770 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
1772 #define DMA_HIFCR_CTCIF4_Pos (5U) macro1773 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
5861 #define DMA_HIFCR_CTCIF4_Pos (5U) macro5862 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
5922 #define DMA_HIFCR_CTCIF4_Pos (5U) macro5923 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6043 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6044 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6315 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6316 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6161 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6162 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
5982 #define DMA_HIFCR_CTCIF4_Pos (5U) macro5983 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
5976 #define DMA_HIFCR_CTCIF4_Pos (5U) macro5977 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
5978 #define DMA_HIFCR_CTCIF4_Pos (5U) macro5979 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6279 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6280 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6252 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6253 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6013 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6014 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
5863 #define DMA_HIFCR_CTCIF4_Pos (5U) macro5864 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6162 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6163 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6312 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6313 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
5828 #define DMA_HIFCR_CTCIF4_Pos (5U) macro5829 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
5812 #define DMA_HIFCR_CTCIF4_Pos (5U) macro5813 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6042 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6043 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
6026 #define DMA_HIFCR_CTCIF4_Pos (5U) macro6027 #define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
