Searched refs:DMA_HIFCR_CHTIF5_Pos (Results 1 – 25 of 87) sorted by relevance
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1816 #define DMA_HIFCR_CHTIF5_Pos (10U) macro1817 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
1806 #define DMA_HIFCR_CHTIF5_Pos (10U) macro1807 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
1757 #define DMA_HIFCR_CHTIF5_Pos (10U) macro1758 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
1760 #define DMA_HIFCR_CHTIF5_Pos (10U) macro1761 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
5849 #define DMA_HIFCR_CHTIF5_Pos (10U) macro5850 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
5910 #define DMA_HIFCR_CHTIF5_Pos (10U) macro5911 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6031 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6032 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6303 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6304 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6149 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6150 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
5970 #define DMA_HIFCR_CHTIF5_Pos (10U) macro5971 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
5964 #define DMA_HIFCR_CHTIF5_Pos (10U) macro5965 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
5966 #define DMA_HIFCR_CHTIF5_Pos (10U) macro5967 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6267 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6268 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6240 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6241 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6001 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6002 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
5851 #define DMA_HIFCR_CHTIF5_Pos (10U) macro5852 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6150 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6151 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6300 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6301 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
5816 #define DMA_HIFCR_CHTIF5_Pos (10U) macro5817 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
5800 #define DMA_HIFCR_CHTIF5_Pos (10U) macro5801 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6030 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6031 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
6014 #define DMA_HIFCR_CHTIF5_Pos (10U) macro6015 #define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
