Searched refs:DMA_FLAG_HTIF0_4 (Results 1 – 10 of 10) sorted by relevance
339 #define DMA_FLAG_HTIF0_4 0x00000010U macro428 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\429 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\430 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\431 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
647 mask_cpltlevel = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()711 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()727 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()738 regs->IFCR = (DMA_FLAG_HTIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()801 if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET) in HAL_DMA_IRQHandler()806 regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; in HAL_DMA_IRQHandler()
648 mask_cpltlevel = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()712 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()728 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()739 regs->IFCR = (DMA_FLAG_HTIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()802 if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET) in HAL_DMA_IRQHandler()807 regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; in HAL_DMA_IRQHandler()
644 mask_cpltlevel = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()708 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()724 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()734 regs->IFCR = (DMA_FLAG_HTIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()797 if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET) in HAL_DMA_IRQHandler()802 regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; in HAL_DMA_IRQHandler()
601 #define DMA_FLAG_HTIF0_4 ((uint32_t)0x00000010U) macro788 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\789 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\790 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\791 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\823 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\824 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\825 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\826 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
355 #define DMA_FLAG_HTIF0_4 0x00000010U macro444 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\445 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\446 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\447 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
365 #define DMA_FLAG_HTIF0_4 0x00000010U macro454 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\455 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\456 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\457 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
523 #define DMA_FLAG_HTIF0_4 ((uint32_t)0x00000010U) macro619 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\620 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\621 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\622 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
789 cpltlevel_mask = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU); in HAL_DMA_PollForTransfer()892 (*ifcr_reg) = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << (hdma->StreamIndex & 0x1FU); in HAL_DMA_PollForTransfer()903 (*ifcr_reg) = (DMA_FLAG_HTIF0_4) << (hdma->StreamIndex & 0x1FU); in HAL_DMA_PollForTransfer()969 if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) in HAL_DMA_IRQHandler()974 regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU); in HAL_DMA_IRQHandler()
1025 cpltlevel_mask = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU); in HAL_DMA_PollForTransfer()1174 (*ifcr_reg) = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << (hdma->StreamIndex & 0x1FU); in HAL_DMA_PollForTransfer()1191 (*ifcr_reg) = (DMA_FLAG_HTIF0_4) << (hdma->StreamIndex & 0x1FU); in HAL_DMA_PollForTransfer()1264 if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) in HAL_DMA_IRQHandler()1269 regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU); in HAL_DMA_IRQHandler()
