Home
last modified time | relevance | path

Searched refs:DMA_CNDTR_NDT_Pos (Results 1 – 25 of 160) sorted by relevance

1234567

/hal_stm32-latest/stm32cube/stm32wb0x/soc/
Dstm32wb05.h1262 #define DMA_CNDTR_NDT_Pos (0UL) /*!<DMA CNDTR: … macro
1265 …fine DMA_CNDTR_NDT_0 (0x1U << DMA_CNDTR_NDT_Pos)
1266 …fine DMA_CNDTR_NDT_1 (0x2U << DMA_CNDTR_NDT_Pos)
1267 …fine DMA_CNDTR_NDT_2 (0x4U << DMA_CNDTR_NDT_Pos)
1268 …fine DMA_CNDTR_NDT_3 (0x8U << DMA_CNDTR_NDT_Pos)
1269 …ine DMA_CNDTR_NDT_4 (0x10U << DMA_CNDTR_NDT_Pos)
1270 …ine DMA_CNDTR_NDT_5 (0x20U << DMA_CNDTR_NDT_Pos)
1271 …ine DMA_CNDTR_NDT_6 (0x40U << DMA_CNDTR_NDT_Pos)
1272 …ine DMA_CNDTR_NDT_7 (0x80U << DMA_CNDTR_NDT_Pos)
1273 …ne DMA_CNDTR_NDT_8 (0x100U << DMA_CNDTR_NDT_Pos)
[all …]
Dstm32wb07.h1351 #define DMA_CNDTR_NDT_Pos (0UL) /*!<DMA CNDTR: … macro
1354 …fine DMA_CNDTR_NDT_0 (0x1U << DMA_CNDTR_NDT_Pos)
1355 …fine DMA_CNDTR_NDT_1 (0x2U << DMA_CNDTR_NDT_Pos)
1356 …fine DMA_CNDTR_NDT_2 (0x4U << DMA_CNDTR_NDT_Pos)
1357 …fine DMA_CNDTR_NDT_3 (0x8U << DMA_CNDTR_NDT_Pos)
1358 …ine DMA_CNDTR_NDT_4 (0x10U << DMA_CNDTR_NDT_Pos)
1359 …ine DMA_CNDTR_NDT_5 (0x20U << DMA_CNDTR_NDT_Pos)
1360 …ine DMA_CNDTR_NDT_6 (0x40U << DMA_CNDTR_NDT_Pos)
1361 …ine DMA_CNDTR_NDT_7 (0x80U << DMA_CNDTR_NDT_Pos)
1362 …ne DMA_CNDTR_NDT_8 (0x100U << DMA_CNDTR_NDT_Pos)
[all …]
Dstm32wb09.h1262 #define DMA_CNDTR_NDT_Pos (0UL) /*!<DMA CNDTR: … macro
1265 …fine DMA_CNDTR_NDT_0 (0x1U << DMA_CNDTR_NDT_Pos)
1266 …fine DMA_CNDTR_NDT_1 (0x2U << DMA_CNDTR_NDT_Pos)
1267 …fine DMA_CNDTR_NDT_2 (0x4U << DMA_CNDTR_NDT_Pos)
1268 …fine DMA_CNDTR_NDT_3 (0x8U << DMA_CNDTR_NDT_Pos)
1269 …ine DMA_CNDTR_NDT_4 (0x10U << DMA_CNDTR_NDT_Pos)
1270 …ine DMA_CNDTR_NDT_5 (0x20U << DMA_CNDTR_NDT_Pos)
1271 …ine DMA_CNDTR_NDT_6 (0x40U << DMA_CNDTR_NDT_Pos)
1272 …ine DMA_CNDTR_NDT_7 (0x80U << DMA_CNDTR_NDT_Pos)
1273 …ne DMA_CNDTR_NDT_8 (0x100U << DMA_CNDTR_NDT_Pos)
[all …]
Dstm32wb06.h1351 #define DMA_CNDTR_NDT_Pos (0UL) /*!<DMA CNDTR: … macro
1354 …fine DMA_CNDTR_NDT_0 (0x1U << DMA_CNDTR_NDT_Pos)
1355 …fine DMA_CNDTR_NDT_1 (0x2U << DMA_CNDTR_NDT_Pos)
1356 …fine DMA_CNDTR_NDT_2 (0x4U << DMA_CNDTR_NDT_Pos)
1357 …fine DMA_CNDTR_NDT_3 (0x8U << DMA_CNDTR_NDT_Pos)
1358 …ine DMA_CNDTR_NDT_4 (0x10U << DMA_CNDTR_NDT_Pos)
1359 …ine DMA_CNDTR_NDT_5 (0x20U << DMA_CNDTR_NDT_Pos)
1360 …ine DMA_CNDTR_NDT_6 (0x40U << DMA_CNDTR_NDT_Pos)
1361 …ine DMA_CNDTR_NDT_7 (0x80U << DMA_CNDTR_NDT_Pos)
1362 …ne DMA_CNDTR_NDT_8 (0x100U << DMA_CNDTR_NDT_Pos)
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h3051 #define DMA_CNDTR_NDT_Pos (0U) macro
3052 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f101xb.h3113 #define DMA_CNDTR_NDT_Pos (0U) macro
3114 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f100xb.h3265 #define DMA_CNDTR_NDT_Pos (0U) macro
3266 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f102x6.h3100 #define DMA_CNDTR_NDT_Pos (0U) macro
3101 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h1132 #define DMA_CNDTR_NDT_Pos (0U) macro
1133 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f030x8.h1154 #define DMA_CNDTR_NDT_Pos (0U) macro
1155 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f070x6.h1177 #define DMA_CNDTR_NDT_Pos (0U) macro
1178 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f031x6.h1148 #define DMA_CNDTR_NDT_Pos (0U) macro
1149 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f030xc.h1173 #define DMA_CNDTR_NDT_Pos (0U) macro
1174 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f038xx.h1147 #define DMA_CNDTR_NDT_Pos (0U) macro
1148 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32f070xb.h1209 #define DMA_CNDTR_NDT_Pos (0U) macro
1210 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h1438 #define DMA_CNDTR_NDT_Pos (0U) macro
1439 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l010x8.h1201 #define DMA_CNDTR_NDT_Pos (0U) macro
1202 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l010xb.h1209 #define DMA_CNDTR_NDT_Pos (0U) macro
1210 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l011xx.h1250 #define DMA_CNDTR_NDT_Pos (0U) macro
1251 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l021xx.h1378 #define DMA_CNDTR_NDT_Pos (0U) macro
1379 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l031xx.h1310 #define DMA_CNDTR_NDT_Pos (0U) macro
1311 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l051xx.h1351 #define DMA_CNDTR_NDT_Pos (0U) macro
1352 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l010x4.h1193 #define DMA_CNDTR_NDT_Pos (0U) macro
1194 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l010x6.h1199 #define DMA_CNDTR_NDT_Pos (0U) macro
1200 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */
Dstm32l081xx.h1510 #define DMA_CNDTR_NDT_Pos (0U) macro
1511 #define DMA_CNDTR_NDT_Msk (0xFFFFUL << DMA_CNDTR_NDT_Pos) /*!< 0x0000FFFF */

1234567