Searched refs:DMA_CCR_CIRC_Pos (Results 1 – 25 of 160) sorted by relevance
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3018 #define DMA_CCR_CIRC_Pos (5U) macro3019 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
3080 #define DMA_CCR_CIRC_Pos (5U) macro3081 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
3232 #define DMA_CCR_CIRC_Pos (5U) macro3233 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
3067 #define DMA_CCR_CIRC_Pos (5U) macro3068 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
3579 #define DMA_CCR_CIRC_Pos (5U) macro3580 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
3551 #define DMA_CCR_CIRC_Pos (5U) macro3552 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
3475 #define DMA_CCR_CIRC_Pos (5U) macro3476 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1099 #define DMA_CCR_CIRC_Pos (5U) macro1100 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1121 #define DMA_CCR_CIRC_Pos (5U) macro1122 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1144 #define DMA_CCR_CIRC_Pos (5U) macro1145 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1115 #define DMA_CCR_CIRC_Pos (5U) macro1116 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1140 #define DMA_CCR_CIRC_Pos (5U) macro1141 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1114 #define DMA_CCR_CIRC_Pos (5U) macro1115 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1176 #define DMA_CCR_CIRC_Pos (5U) macro1177 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1405 #define DMA_CCR_CIRC_Pos (5U) macro1406 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1168 #define DMA_CCR_CIRC_Pos (5U) macro1169 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1217 #define DMA_CCR_CIRC_Pos (5U) macro1218 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1345 #define DMA_CCR_CIRC_Pos (5U) macro1346 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1277 #define DMA_CCR_CIRC_Pos (5U) macro1278 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1318 #define DMA_CCR_CIRC_Pos (5U) macro1319 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1160 #define DMA_CCR_CIRC_Pos (5U) macro1161 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1166 #define DMA_CCR_CIRC_Pos (5U) macro1167 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1477 #define DMA_CCR_CIRC_Pos (5U) macro1478 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
1349 #define DMA_CCR_CIRC_Pos (5U) macro1350 #define DMA_CCR_CIRC_Msk (0x1UL << DMA_CCR_CIRC_Pos) /*!< 0x00000020 */
