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Searched refs:DMAMUX_RGSR_OF5_Pos (Results 1 – 25 of 46) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h7187 #define DMAMUX_RGSR_OF5_Pos (5U) macro
7188 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h7b0xx.h7441 #define DMAMUX_RGSR_OF5_Pos (5U) macro
7442 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h7b0xxq.h7442 #define DMAMUX_RGSR_OF5_Pos (5U) macro
7443 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h7a3xxq.h7188 #define DMAMUX_RGSR_OF5_Pos (5U) macro
7189 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h7b3xx.h7441 #define DMAMUX_RGSR_OF5_Pos (5U) macro
7442 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h7b3xxq.h7442 #define DMAMUX_RGSR_OF5_Pos (5U) macro
7443 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h730xxq.h9598 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9599 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h733xx.h9597 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9598 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h725xx.h9344 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9345 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h730xx.h9597 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9598 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h735xx.h9598 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9599 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h742xx.h9070 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9071 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h723xx.h9343 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9344 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h750xx.h9358 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9359 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h753xx.h9358 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9359 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h745xx.h9272 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9273 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h745xg.h9272 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9273 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h743xx.h9165 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9166 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h755xx.h9465 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9466 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h757xx.h9548 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9549 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h747xg.h9355 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9356 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32h747xx.h9355 #define DMAMUX_RGSR_OF5_Pos (5U) macro
9356 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h16373 #define DMAMUX_RGSR_OF5_Pos (5U) macro
16374 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32mp151fxx_cm4.h16536 #define DMAMUX_RGSR_OF5_Pos (5U) macro
16537 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */
Dstm32mp151axx_ca7.h16373 #define DMAMUX_RGSR_OF5_Pos (5U) macro
16374 #define DMAMUX_RGSR_OF5_Msk (0x1UL << DMAMUX_RGSR_OF5_Pos) /*!< 0x00000020 */

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