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Searched refs:DMA2_Stream5 (Results 1 – 25 of 100) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_dma.h415 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
435 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
455 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
475 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
495 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
Dstm32f7xx_ll_dma.h436 ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream5)) ? LL_DMA_STREAM_5 : \
459 …== ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_5))) ? DMA2_Stream5 : \
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_dma.h431 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
451 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
471 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
491 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
511 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
Dstm32f2xx_ll_dma.h423 ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream5)) ? LL_DMA_STREAM_5 : \
446 …== ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_5))) ? DMA2_Stream5 : \
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_dma.h441 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
461 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
481 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
501 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
521 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
Dstm32f4xx_ll_dma.h433 ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream5)) ? LL_DMA_STREAM_5 : \
456 …== ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_5))) ? DMA2_Stream5 : \
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_dma.h726 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
761 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
795 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
830 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
864 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
899 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
932 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
956 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
Dstm32h7xx_ll_dma.h428 ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream5)) ? LL_DMA_STREAM_5 : \
451 …== ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_5))) ? DMA2_Stream5 : \
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_dma.h603 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
626 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
649 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
672 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
696 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
Dstm32mp1xx_ll_dma.h413 ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream5)) ? LL_DMA_STREAM_5 : \
436 …== ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_5))) ? DMA2_Stream5 : \
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h701 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
7078 ((INSTANCE) == DMA2_Stream5) || \
Dstm32f410rx.h701 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
7082 ((INSTANCE) == DMA2_Stream5) || \
Dstm32f410tx.h691 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
7038 ((INSTANCE) == DMA2_Stream5) || \
Dstm32f401xc.h803 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
8268 ((INSTANCE) == DMA2_Stream5) || \
Dstm32f401xe.h803 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
8268 ((INSTANCE) == DMA2_Stream5) || \
Dstm32f411xe.h806 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
8299 ((INSTANCE) == DMA2_Stream5) || \
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h2487 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
21745 ((INSTANCE) == DMA2_Stream5) || \
21797 ((INSTANCE) == DMA2_Stream5) || \
21833 ((INSTANCE) == DMA2_Stream5) || \
21851 ((INSTANCE) == DMA2_Stream5) || \
Dstm32h7b0xx.h2610 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
22225 ((INSTANCE) == DMA2_Stream5) || \
22277 ((INSTANCE) == DMA2_Stream5) || \
22313 ((INSTANCE) == DMA2_Stream5) || \
22331 ((INSTANCE) == DMA2_Stream5) || \
Dstm32h7b0xxq.h2611 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
22237 ((INSTANCE) == DMA2_Stream5) || \
22289 ((INSTANCE) == DMA2_Stream5) || \
22325 ((INSTANCE) == DMA2_Stream5) || \
22343 ((INSTANCE) == DMA2_Stream5) || \
Dstm32h7a3xxq.h2488 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
21757 ((INSTANCE) == DMA2_Stream5) || \
21809 ((INSTANCE) == DMA2_Stream5) || \
21845 ((INSTANCE) == DMA2_Stream5) || \
21863 ((INSTANCE) == DMA2_Stream5) || \
Dstm32h7b3xx.h2610 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
22232 ((INSTANCE) == DMA2_Stream5) || \
22284 ((INSTANCE) == DMA2_Stream5) || \
22320 ((INSTANCE) == DMA2_Stream5) || \
22338 ((INSTANCE) == DMA2_Stream5) || \
Dstm32h7b3xxq.h2611 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
22244 ((INSTANCE) == DMA2_Stream5) || \
22296 ((INSTANCE) == DMA2_Stream5) || \
22332 ((INSTANCE) == DMA2_Stream5) || \
22350 ((INSTANCE) == DMA2_Stream5) || \
Dstm32h730xxq.h2718 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
23971 ((INSTANCE) == DMA2_Stream5) || \
24007 ((INSTANCE) == DMA2_Stream5) || \
24043 ((INSTANCE) == DMA2_Stream5) || \
24061 ((INSTANCE) == DMA2_Stream5) || \
Dstm32h733xx.h2717 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
23959 ((INSTANCE) == DMA2_Stream5) || \
23995 ((INSTANCE) == DMA2_Stream5) || \
24031 ((INSTANCE) == DMA2_Stream5) || \
24049 ((INSTANCE) == DMA2_Stream5) || \
Dstm32h725xx.h2595 #define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE) macro
23484 ((INSTANCE) == DMA2_Stream5) || \
23520 ((INSTANCE) == DMA2_Stream5) || \
23556 ((INSTANCE) == DMA2_Stream5) || \
23574 ((INSTANCE) == DMA2_Stream5) || \

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