Home
last modified time | relevance | path

Searched refs:DMA2D_OCOLR_RED_1_Pos (Results 1 – 25 of 32) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h7469 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7470 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h7b0xx.h7723 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7724 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h7b0xxq.h7724 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7725 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h7a3xxq.h7470 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7471 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h7b3xx.h7723 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7724 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h7b3xxq.h7724 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7725 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h730xxq.h9880 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9881 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h733xx.h9879 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9880 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h725xx.h9626 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9627 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h730xx.h9879 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9880 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h735xx.h9880 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9881 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h742xx.h9352 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9353 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h723xx.h9625 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9626 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h750xx.h9640 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9641 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h753xx.h9640 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9641 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h745xx.h9554 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9555 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h745xg.h9554 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9555 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h743xx.h9447 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9448 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h755xx.h9747 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9748 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32h757xx.h9830 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
9831 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u575xx.h6687 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
6688 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32u585xx.h7136 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7137 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32u595xx.h6943 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
6944 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32u5a5xx.h7392 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7393 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */
Dstm32u5f7xx.h7244 #define DMA2D_OCOLR_RED_1_Pos (16U) macro
7245 #define DMA2D_OCOLR_RED_1_Msk (0xFFUL << DMA2D_OCOLR_RED_1_Pos) /*0x00FF0000U */

12