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Searched refs:DMA2D_CR_TWIE_Pos (Results 1 – 25 of 65) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h6307 #define DMA2D_CR_TWIE_Pos (10U) macro
6308 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f429xx.h6366 #define DMA2D_CR_TWIE_Pos (10U) macro
6367 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f439xx.h6553 #define DMA2D_CR_TWIE_Pos (10U) macro
6554 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f437xx.h6499 #define DMA2D_CR_TWIE_Pos (10U) macro
6500 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f469xx.h6468 #define DMA2D_CR_TWIE_Pos (10U) macro
6469 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f479xx.h6658 #define DMA2D_CR_TWIE_Pos (10U) macro
6659 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f750xx.h6641 #define DMA2D_CR_TWIE_Pos (10U) macro
6642 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f745xx.h6398 #define DMA2D_CR_TWIE_Pos (10U) macro
6399 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f756xx.h6641 #define DMA2D_CR_TWIE_Pos (10U) macro
6642 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f746xx.h6453 #define DMA2D_CR_TWIE_Pos (10U) macro
6454 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f765xx.h6858 #define DMA2D_CR_TWIE_Pos (10U) macro
6859 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f777xx.h7140 #define DMA2D_CR_TWIE_Pos (10U) macro
7141 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f767xx.h6952 #define DMA2D_CR_TWIE_Pos (10U) macro
6953 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32f779xx.h7223 #define DMA2D_CR_TWIE_Pos (10U) macro
7224 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4a6xx.h7765 #define DMA2D_CR_TWIE_Pos (10U) macro
7766 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32l496xx.h7520 #define DMA2D_CR_TWIE_Pos (10U) macro
7521 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32l4r5xx.h7651 #define DMA2D_CR_TWIE_Pos (10U) macro
7652 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32l4r7xx.h7737 #define DMA2D_CR_TWIE_Pos (10U) macro
7738 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32l4s5xx.h7903 #define DMA2D_CR_TWIE_Pos (10U) macro
7904 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32l4s7xx.h7989 #define DMA2D_CR_TWIE_Pos (10U) macro
7990 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h7249 #define DMA2D_CR_TWIE_Pos (10U) macro
7250 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32h7b0xx.h7503 #define DMA2D_CR_TWIE_Pos (10U) macro
7504 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32h7b0xxq.h7504 #define DMA2D_CR_TWIE_Pos (10U) macro
7505 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
Dstm32h7a3xxq.h7250 #define DMA2D_CR_TWIE_Pos (10U) macro
7251 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5195 #define DMA2D_CR_TWIE_Pos (10U) macro
5196 #define DMA2D_CR_TWIE_Msk (0x1UL << DMA2D_CR_TWIE_Pos) /*!< 0x00000400 */

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