Home
last modified time | relevance | path

Searched refs:DMA1_Stream4_BASE (Results 1 – 25 of 92) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_dma.h52 (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma.h52 (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma.h52 (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_dma.h52 (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma.h53 (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h623 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
691 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f410rx.h623 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
691 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f410tx.h616 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
681 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f401xc.h705 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
793 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f401xe.h705 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
793 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f411xe.h707 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
796 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f405xx.h902 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1017 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f412cx.h879 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
985 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f415xx.h970 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1088 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f423xx.h1066 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1206 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f407xx.h998 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1119 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f412zx.h928 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1042 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f412rx.h925 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1036 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f412vx.h926 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1038 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f413xx.h1032 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1171 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h954 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1070 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f205xx.h908 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1022 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f207xx.h1004 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1124 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h1034 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1152 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
Dstm32f722xx.h1020 #define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL) macro
1137 #define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)

1234