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Searched refs:DMA1_Stream1_BASE (Results 1 – 25 of 92) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_dma.h49 (uint8_t)(DMA1_Stream1_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma.h49 (uint8_t)(DMA1_Stream1_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma.h49 (uint8_t)(DMA1_Stream1_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_dma.h49 (uint8_t)(DMA1_Stream1_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma.h50 (uint8_t)(DMA1_Stream1_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h620 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
688 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f410rx.h620 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
688 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f410tx.h613 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
678 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f401xc.h702 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
790 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f401xe.h702 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
790 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f411xe.h704 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
793 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f405xx.h899 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1014 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f412cx.h876 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
982 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f415xx.h967 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1085 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f423xx.h1063 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1203 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f407xx.h995 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1116 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f412zx.h925 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1039 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f412rx.h922 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1033 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f412vx.h923 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1035 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f413xx.h1029 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1168 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h951 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1067 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f205xx.h905 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1019 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f207xx.h1001 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1121 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h1031 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1149 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
Dstm32f722xx.h1017 #define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL) macro
1134 #define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)

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