Searched refs:DMA1_CSELR_CH7_TIM2_CH4_Msk (Results 1 – 2 of 2) sorted by relevance
5939 #define DMA1_CSELR_CH7_TIM2_CH4_Msk (0x5UL << DMA1_CSELR_CH7_TIM2_CH4_Pos) /*!< 0x05000000 */ macro5940 #define DMA1_CSELR_CH7_TIM2_CH4 DMA1_CSELR_CH7_TIM2_CH4_Msk /*!< Remap TIM2 chan…