Searched refs:DMA1_CSELR_CH5_TIM1_CH3_Msk (Results 1 – 3 of 3) sorted by relevance
1359 #define DMA1_CSELR_CH5_TIM1_CH3_Msk (0x1UL << DMA1_CSELR_CH5_TIM1_CH3_Pos) /*!< 0x00040000 */ macro1360 #define DMA1_CSELR_CH5_TIM1_CH3 DMA1_CSELR_CH5_TIM1_CH3_Msk /*!< Remap TIM1 chan…
5852 #define DMA1_CSELR_CH5_TIM1_CH3_Msk (0x1UL << DMA1_CSELR_CH5_TIM1_CH3_Pos) /*!< 0x00040000 */ macro5853 #define DMA1_CSELR_CH5_TIM1_CH3 DMA1_CSELR_CH5_TIM1_CH3_Msk /*!< Remap TIM1 chan…