Searched refs:DMA1_CSELR_CH4_TIM3_CH1_Msk (Results 1 – 3 of 3) sorted by relevance
1323 #define DMA1_CSELR_CH4_TIM3_CH1_Msk (0x3UL << DMA1_CSELR_CH4_TIM3_CH1_Pos) /*!< 0x00006000 */ macro1324 #define DMA1_CSELR_CH4_TIM3_CH1 DMA1_CSELR_CH4_TIM3_CH1_Msk /*!< Remap TIM3 chan…
5810 #define DMA1_CSELR_CH4_TIM3_CH1_Msk (0x3UL << DMA1_CSELR_CH4_TIM3_CH1_Pos) /*!< 0x00006000 */ macro5811 #define DMA1_CSELR_CH4_TIM3_CH1 DMA1_CSELR_CH4_TIM3_CH1_Msk /*!< Remap TIM3 chan…