Searched refs:DMA1_CSELR_CH3_TIM2_CH2_Msk (Results 1 – 2 of 2) sorted by relevance
5762 #define DMA1_CSELR_CH3_TIM2_CH2_Msk (0x5UL << DMA1_CSELR_CH3_TIM2_CH2_Pos) /*!< 0x00000500 */ macro5763 #define DMA1_CSELR_CH3_TIM2_CH2 DMA1_CSELR_CH3_TIM2_CH2_Msk /*!< Remap TIM2 chan…