Searched refs:DMA1_CSELR_CH2_TIM17_CH1_Pos (Results 1 – 3 of 3) sorted by relevance
1250 #define DMA1_CSELR_CH2_TIM17_CH1_Pos (4U) macro1251 #define DMA1_CSELR_CH2_TIM17_CH1_Msk (0x7UL << DMA1_CSELR_CH2_TIM17_CH1_Pos) /*!< 0x00000070 */
5716 #define DMA1_CSELR_CH2_TIM17_CH1_Pos (4U) macro5717 #define DMA1_CSELR_CH2_TIM17_CH1_Msk (0x7UL << DMA1_CSELR_CH2_TIM17_CH1_Pos) /*!< 0x00000070 */