Searched refs:DMA1_CSELR_CH2_TIM17_CH1_Msk (Results 1 – 3 of 3) sorted by relevance
1251 #define DMA1_CSELR_CH2_TIM17_CH1_Msk (0x7UL << DMA1_CSELR_CH2_TIM17_CH1_Pos) /*!< 0x00000070 */ macro1252 #define DMA1_CSELR_CH2_TIM17_CH1 DMA1_CSELR_CH2_TIM17_CH1_Msk /*!< Remap TIM17 cha…
5717 #define DMA1_CSELR_CH2_TIM17_CH1_Msk (0x7UL << DMA1_CSELR_CH2_TIM17_CH1_Pos) /*!< 0x00000070 */ macro5718 #define DMA1_CSELR_CH2_TIM17_CH1 DMA1_CSELR_CH2_TIM17_CH1_Msk /*!< Remap TIM17 cha…