Home
last modified time | relevance | path

Searched refs:DIVIDER_R_UPDATE (Results 1 – 4 of 4) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc_ex.c46 #define DIVIDER_R_UPDATE 2U macro
128 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
134 ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
521 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
569 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
857 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
1129 ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
1182 ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
1235 ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
1280 if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK) in HAL_RCCEx_PeriphCLKConfig()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_rcc_ex.c49 #define DIVIDER_R_UPDATE 2U macro
655 ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
670 ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
759 ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_rcc_ex.c49 #define DIVIDER_R_UPDATE 2U macro
632 ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_R_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_rcc_ex.c47 #define DIVIDER_R_UPDATE 2U macro