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Searched refs:DIVIDER_P_UPDATE (Results 1 – 4 of 4) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc_ex.c44 #define DIVIDER_P_UPDATE 0U macro
175 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
181 ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
228 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
234 ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
283 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
289 ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
343 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
349 ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
402 ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_rcc_ex.c47 #define DIVIDER_P_UPDATE 0U macro
172 ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
178 ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
220 ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
226 ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
458 ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
2584 if (Divider == DIVIDER_P_UPDATE) in RCCEx_PLLSAI1_Config()
2724 if (Divider == DIVIDER_P_UPDATE) in RCCEx_PLLSAI2_Config()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_rcc_ex.c47 #define DIVIDER_P_UPDATE 0U macro
225 ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
233 ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
283 ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
289 ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); in HAL_RCCEx_PeriphCLKConfig()
2998 if(Divider == DIVIDER_P_UPDATE) in RCCEx_PLLSAI1_Config()
3203 if(Divider == DIVIDER_P_UPDATE) in RCCEx_PLLSAI2_Config()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_rcc_ex.c45 #define DIVIDER_P_UPDATE 0U macro