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Searched refs:DIVENCR (Results 1 – 6 of 6) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h6371 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC1ENC); in LL_RCC_IC1_Disable()
6451 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC2ENC); in LL_RCC_IC2_Disable()
6531 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC3ENC); in LL_RCC_IC3_Disable()
6611 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC4ENC); in LL_RCC_IC4_Disable()
6691 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC5ENC); in LL_RCC_IC5_Disable()
6771 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC6ENC); in LL_RCC_IC6_Disable()
6851 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC7ENC); in LL_RCC_IC7_Disable()
6931 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC8ENC); in LL_RCC_IC8_Disable()
7011 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC9ENC); in LL_RCC_IC9_Disable()
7091 WRITE_REG(RCC->DIVENCR, RCC_DIVENCR_IC10ENC); in LL_RCC_IC10_Disable()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_ll_rcc.c249 WRITE_REG(RCC->DIVENCR, 0x00FFFFFFU); in LL_RCC_DeInit()
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h2147 …__IO uint32_t DIVENCR; /*!< RCC divider enable clear register … member
Dstm32n657xx.h2273 …__IO uint32_t DIVENCR; /*!< RCC divider enable clear register … member
Dstm32n655xx.h2245 …__IO uint32_t DIVENCR; /*!< RCC divider enable clear register … member
Dstm32n647xx.h2175 …__IO uint32_t DIVENCR; /*!< RCC divider enable clear register … member