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Searched refs:DDRPHYC_PGSR_DTDONE_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h8421 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
8422 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp151fxx_cm4.h8584 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
8585 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp151axx_ca7.h8421 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
8422 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp151axx_cm4.h8387 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
8388 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp151dxx_cm4.h8387 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
8388 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp151cxx_ca7.h8618 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
8619 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp151cxx_cm4.h8584 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
8585 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp151fxx_ca7.h8618 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
8619 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp153axx_ca7.h9972 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
9973 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp153axx_cm4.h9938 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
9939 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp153cxx_ca7.h10169 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10170 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp153cxx_cm4.h10135 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10136 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp153dxx_ca7.h9972 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
9973 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp153dxx_cm4.h9938 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
9939 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp153fxx_ca7.h10169 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10170 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp153fxx_cm4.h10135 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10136 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp157axx_ca7.h10087 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10088 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp157axx_cm4.h10053 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10054 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp157cxx_ca7.h10284 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10285 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp157cxx_cm4.h10250 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10251 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp157dxx_ca7.h10087 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10088 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp157dxx_cm4.h10053 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10054 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp157fxx_ca7.h10284 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10285 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */
Dstm32mp157fxx_cm4.h10250 #define DDRPHYC_PGSR_DTDONE_Pos (4U) macro
10251 #define DDRPHYC_PGSR_DTDONE_Msk (0x1UL << DDRPHYC_PGSR_DTDONE_Pos) /*!< 0x00000010 */