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Searched refs:DDRPHYC_PGSR_DIDONE_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h8418 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
8419 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp151fxx_cm4.h8581 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
8582 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp151axx_ca7.h8418 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
8419 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp151axx_cm4.h8384 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
8385 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp151dxx_cm4.h8384 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
8385 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp151cxx_ca7.h8615 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
8616 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp151cxx_cm4.h8581 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
8582 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp151fxx_ca7.h8615 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
8616 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp153axx_ca7.h9969 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
9970 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp153axx_cm4.h9935 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
9936 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp153cxx_ca7.h10166 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10167 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp153cxx_cm4.h10132 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10133 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp153dxx_ca7.h9969 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
9970 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp153dxx_cm4.h9935 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
9936 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp153fxx_ca7.h10166 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10167 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp153fxx_cm4.h10132 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10133 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp157axx_ca7.h10084 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10085 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp157axx_cm4.h10050 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10051 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp157cxx_ca7.h10281 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10282 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp157cxx_cm4.h10247 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10248 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp157dxx_ca7.h10084 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10085 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp157dxx_cm4.h10050 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10051 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp157fxx_ca7.h10281 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10282 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */
Dstm32mp157fxx_cm4.h10247 #define DDRPHYC_PGSR_DIDONE_Pos (3U) macro
10248 #define DDRPHYC_PGSR_DIDONE_Msk (0x1UL << DDRPHYC_PGSR_DIDONE_Pos) /*!< 0x00000008 */