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Searched refs:DDRPHYC_DSGCR_RSTOE_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h8794 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
8795 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp151fxx_cm4.h8957 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
8958 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp151axx_ca7.h8794 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
8795 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp151axx_cm4.h8760 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
8761 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp151dxx_cm4.h8760 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
8761 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp151cxx_ca7.h8991 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
8992 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp151cxx_cm4.h8957 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
8958 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp151fxx_ca7.h8991 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
8992 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp153axx_ca7.h10345 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10346 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp153axx_cm4.h10311 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10312 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp153cxx_ca7.h10542 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10543 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp153cxx_cm4.h10508 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10509 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp153dxx_ca7.h10345 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10346 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp153dxx_cm4.h10311 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10312 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp153fxx_ca7.h10542 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10543 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp153fxx_cm4.h10508 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10509 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp157axx_ca7.h10460 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10461 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp157axx_cm4.h10426 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10427 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp157cxx_ca7.h10657 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10658 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp157cxx_cm4.h10623 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10624 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp157dxx_ca7.h10460 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10461 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp157dxx_cm4.h10426 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10427 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp157fxx_ca7.h10657 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10658 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */
Dstm32mp157fxx_cm4.h10623 #define DDRPHYC_DSGCR_RSTOE_Pos (30U) macro
10624 #define DDRPHYC_DSGCR_RSTOE_Msk (0x1UL << DDRPHYC_DSGCR_RSTOE_Pos) /*!< 0x40000000 */