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Searched refs:DDRPHYC_DSGCR_PUREN_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h8737 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
8738 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp151fxx_cm4.h8900 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
8901 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp151axx_ca7.h8737 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
8738 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp151axx_cm4.h8703 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
8704 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp151dxx_cm4.h8703 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
8704 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp151cxx_ca7.h8934 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
8935 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp151cxx_cm4.h8900 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
8901 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp151fxx_ca7.h8934 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
8935 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp153axx_ca7.h10288 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10289 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp153axx_cm4.h10254 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10255 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp153cxx_ca7.h10485 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10486 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp153cxx_cm4.h10451 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10452 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp153dxx_ca7.h10288 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10289 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp153dxx_cm4.h10254 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10255 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp153fxx_ca7.h10485 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10486 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp153fxx_cm4.h10451 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10452 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp157axx_ca7.h10403 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10404 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp157axx_cm4.h10369 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10370 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp157cxx_ca7.h10600 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10601 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp157cxx_cm4.h10566 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10567 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp157dxx_ca7.h10403 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10404 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp157dxx_cm4.h10369 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10370 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp157fxx_ca7.h10600 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10601 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */
Dstm32mp157fxx_cm4.h10566 #define DDRPHYC_DSGCR_PUREN_Pos (0U) macro
10567 #define DDRPHYC_DSGCR_PUREN_Msk (0x1UL << DDRPHYC_DSGCR_PUREN_Pos) /*!< 0x00000001 */