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Searched refs:DDRPHYC_DLLGCR_TESTSW_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h8469 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
8470 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp151fxx_cm4.h8632 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
8633 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp151axx_ca7.h8469 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
8470 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp151axx_cm4.h8435 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
8436 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp151dxx_cm4.h8435 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
8436 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp151cxx_ca7.h8666 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
8667 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp151cxx_cm4.h8632 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
8633 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp151fxx_ca7.h8666 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
8667 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp153axx_ca7.h10020 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10021 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp153axx_cm4.h9986 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
9987 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp153cxx_ca7.h10217 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10218 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp153cxx_cm4.h10183 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10184 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp153dxx_ca7.h10020 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10021 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp153dxx_cm4.h9986 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
9987 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp153fxx_ca7.h10217 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10218 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp153fxx_cm4.h10183 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10184 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp157axx_ca7.h10135 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10136 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp157axx_cm4.h10101 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10102 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp157cxx_ca7.h10332 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10333 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp157cxx_cm4.h10298 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10299 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp157dxx_ca7.h10135 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10136 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp157dxx_cm4.h10101 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10102 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp157fxx_ca7.h10332 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10333 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */
Dstm32mp157fxx_cm4.h10298 #define DDRPHYC_DLLGCR_TESTSW_Pos (11U) macro
10299 #define DDRPHYC_DLLGCR_TESTSW_Msk (0x1UL << DDRPHYC_DLLGCR_TESTSW_Pos) /*!< 0x00000800 */