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Searched refs:DDRPHYC_DLLGCR_MBIAS_4 (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h8479 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp151fxx_cm4.h8642 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp151axx_ca7.h8479 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp151axx_cm4.h8445 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp151dxx_cm4.h8445 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp151cxx_ca7.h8676 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp151cxx_cm4.h8642 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp151fxx_ca7.h8676 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp153axx_ca7.h10030 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp153axx_cm4.h9996 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp153cxx_ca7.h10227 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp153cxx_cm4.h10193 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp153dxx_ca7.h10030 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp153dxx_cm4.h9996 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp153fxx_ca7.h10227 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp153fxx_cm4.h10193 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp157axx_ca7.h10145 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp157axx_cm4.h10111 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp157cxx_ca7.h10342 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp157cxx_cm4.h10308 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp157dxx_ca7.h10145 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp157dxx_cm4.h10111 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp157fxx_ca7.h10342 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro
Dstm32mp157fxx_cm4.h10308 #define DDRPHYC_DLLGCR_MBIAS_4 (0x10UL << DDRPHYC_DLLGCR_MBIAS_Pos) /*!< 0x00010000 */ macro